library IEEE;
use IEEE.std_logic_1164.all;

architecture behavior of pwm is
signal s_count: integer range 0 to 20000:=0;
begin
p_pwm_generate:process(clk)
begin
if clk'event and clk='1' then
	if s_count = 19999 then
s_count <=0;
else 
s_count<=s_count+1;
end if; 
if ((s_count < 14200+5000)and(s_count >5000)) then 
o<='1';
else o<='0';
end if; 
end if;
end process;
end behavior;
